The Large Hadron Collider at CERN continue to run at 8 TeV center of mass energy. CERN plans to work at this energy until the end of 2012 with the goal of providing an integrated luminosity of a few fb −1 to the CMS and ATLAS experiments.The LHC will then shut down for 1 to 1.5 years to make the revisions necessary to run at ~14 TeV. Operation resumes in 2013. In 2015 or 2016, there will be another long shutdown to install the collimation required to operate at and above the design luminosity of 1034 cm−2 s−1. Operation will then resume run with the luminosity rising gradually during this period to 2*1034 cm−2 s−1. The two long shutdowns provide CMS an opportunity to carry out improvements to make the experiment more efficient, to repair problems that have been uncovered during operations, and to upgrade the detector to cope with the ultimate luminosity that will be achieved during this period. The detector work involves many components and the pixel detector is one of them.
The pixel upgrade projects that the CMS Collaboration proposes to carry out between now and 2016 to optimize data taking are:
Replacement of the current FPIX system with 3 (rather than 2) forward disks on each side of the IP, redesigned to match with a new 4 layer barrel system; to implement more radiation hard sensors; to reduce dead time in the readout; to lower the material budget. The CMS collaboration is also considering the possibility to employ limited information from the Pixel detector in the Level 1 (L1) trigger. This upgrade is driven by radiation damage (integrated luminosity) and peak instantaneous luminosity (data loss at full trigger rate). The reduced amount of material in the pixel detector results in improved vertex reconstruction and tracking efficiencies and better resolution at all luminosities. The further detailed information on pixel detector and pixel upgrade project can be found in the page of Daniel Pitzl.
The whole pixel barrel detector contain about 48 million readout channels. It is mandatory to test each channel for functionality, noise level, trimming mechanism and bump bonding quality. The qualification process also includes the determination of the operational parameters (like trim bit settings, measurement of noise, gains and pedestals), a check of the sensor I–V dependence and a thermal cycling test.
A Readout Chip (ROC) test and qualification procedure was developed at Paul Scherrer Institut PSI (Zurich). The summary software page and main information resources can be found here. On basis of this code our group at DESY has developed a tool for general testing of ROCs. Detailed information about DESY test set up and results can be found in the folder Presentations from the left side of this page.
Last updated on 01-01-2014